4 job matcher din søgning
SyoSil ApS, Taastrup
Are you a design or verification engineer with ASIC/FPGA skills, and do you have a flair for client communication? If so, then SyoSil has a great career opportunity for you.
The project will focus on digital design and verification for an RF radio ASIC, being part of a large international multi-team project. In this project, SyoSil will assume the full responsibility of several IP blocks, from architecture definition towards RTL design and coverage driven verification closure. Design and verification will be done using SystemVerilog and UVM.
As an ASIC/FPGA design and verification engineer, you will contribute to execution of projects on a large industrial scale, from concept and specification through RTL design to verification based on coverage closure.
Indrykket 13. december
In your new position you will be part of the Chipset Firmware Platform Group consisting of 17 highly skilled colleagues. The atmosphere is informal and humorous but at the same time extremely ambitious and we are not afraid to say that we have some of the best developers in town!
Essentially, the challenge is to deliver the most advanced audio-enabled, wearable IoT device available, packed in a tiny package, running of a miniscule battery and living up to medical device standards. This means that you must be able to design safe C code that provides advanced functionality while taking up no space, using no current and providing real-time guarantees for the audio system. The firmware platform includes HW drivers, power management, RTOS integration and wireless audio protocol development (proprietary and BLE-based).
Indrykket 4. december
Vi søger softwareingeniører til udvikling af de nyeste produkter inden for LTE-standarden.
Med den tidevandsbølge af nye IoT-produkter der er på vej med sigte på 5G, så er LTE ikke gårsdagens kommunikationsteknologi, men en vigtig del af fremtidens.
- Design og implementering af LTE Advanced features.
- Integration og test på R&S CMW500 Radio Communication Tester.
- Fejlanalyse og debug af egne moduler, samt af det samlede system.
Indrykket 16. november